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Synopsys formality
Synopsys formality











synopsys formality

Passionate in learning and supporting new evolving technologies – 5nm/3nm, low power design, 3DIC, machine learning, cloud, data mining etc.

synopsys formality

  • Good verbal and written communication skills in both Chinese and English.
  • Self-motivated, good team worker and great learner.
  • BS/MS in EE, Microelectronics, CS or relevant.
  • #SYNOPSYS FORMALITY SOFTWARE#

    to improve the testing efficiency and solve complicated EDA software testing challenges such as Machine Learning based testing automation, PPA big data handling etc.

  • Design and develop validation solutions/products in Python, C/C++, Perl, Tcl, etc.
  • Analyze customer issues and customer usage/flow, propose coverage improvement plan and enhancement requests to improve the products.
  • Debug and identify the root causes of functionality issues, flow issues including complicated PPA (Performance/Power/Area) issues in RTL2GDS design flow.
  • Study and understand customer requirements and R&D functional specifications, design and execute testing plan to validate new features (new functions, Performance/Power/Area improvements, Advanced node 5nm/3nm enablement etc.) - Using real top-tier customer designs and/or creating new designs to ensure the quality of new features.
  • synopsys formality

    Under this role, a Platform Validation engineer will Platform Validation Engineer is responsible for validating the industry leading SoC implementation products and flow solutions, including “Design Complier NXT”, “IC Compiler II”, “ Formality” and next generation RTL2GDS Digital Design Platform “Fusion Complier”.













    Synopsys formality